Computer vision is a growing research field that includes methods for acquiring, processing, analysing, and understanding images. Notably, one theme of research in computer vision is the depth perception or, in other words, the three-dimensional (3D) vision.
Time-Of-Flight technology, just to take this example, is one of the most promising technologies for depth perception. A Time-Of-Flight (TOF) camera system 3 is illustrated in FIG. 1. TOF camera systems capture 3D images of a scene 15 by analysing the time of flight of light from a light source 18 to an object. TOF camera system 3 includes a camera with a dedicated illumination unit 18 and data processing means 4.
The well-known basic operational principle of a TOF camera system is to actively illuminate the scene 15 with a modulated light 16 at a predetermined wavelength using the dedicated illumination unit, for instance with some light pulses of at least one predetermined frequency. The modulated light is reflected back from objects within the scene. A lens 2 collects the reflected light 17 and forms an image of the objects onto an imaging sensor 1 of the camera. Depending on the distance of objects from the camera, a delay is experienced between the emission of the modulated light, e.g. the so called light pulses, and the reception at the camera of those light pulses. Distance between reflecting objects and the camera may be determined as function of the time delay observed and the speed of light constant value. In one another more complex and reliable embodiment, a plurality of phase differences in between the emitted reference light pulses and the captured light pulses may be determined by correlation measurement and used for estimating depth information.
The determination of the phase differences can be carried out notably by Current-Assisted Photonic Demodulators (CAPDs). The principle of CAPDs is explained in EP1513202 B1 and illustrated by FIG. 2A-C. It is based on demodulation nodes, the so-called “taps”. The CAPD represented on FIG. 2A-C comprises two taps. Each tap consists of a control region 61, 62 and a detection region 63, 64. By controlling a potential applied between the control regions 61 and 62, it is possible to control the detectivity of the associated tap. When a photon is incident within the photosentitive area of a pixel, an electron-hole e−/h+ pair may be generated at a certain position. The electron-hole pair will be separated by an electrical field that is present and that is associated with the flowing majority current. This electrical field will cause the photogenerated minority carriers 66, 69 to drift in the opposite direction to the flowing majority current, i.e. towards the detection regions 63, 64, respectively.
When a pixel comprises several taps and when a positive potential is applied to a tap with respect to the other taps, this tap is activated and will be receiving the majority of the photogenerated minority carriers in the pixel, as illustrated by FIGS. 2B and C. By applying appropriate driving signals to the control regions, correlation measurements can be performed and the depth perception can be obtained.
In FIG. 3, a 2-tap topology of CAPD is presented for illustrating prior art. The pixel contains two demodulation nodes or taps. Each tap consists of a control region 6, 8 and a detection region 5, 7, respectively. In this topology, each detection region 5, 7 is surrounded by a control region 6, 8, respectively. The pixel comprises also the circuitry 11, 12 associated with the taps. Circuitry elements 11, 12 and control region 6, 8 may be highly doped regions p+ whereas the detection region 5, 7 may be an n+ type region. Each detection region 5, 7 may be associated with a depletion region 13, 14, for instance n-well region. In prior art, the layer on which the device is formed is usually a p−− layer. The fact that p-type control region surrounds n-type detection region in a p-type layer enables to avoid leakages between the two detection regions.
The field created between two control nodes must be as high as possible in order to achieve a high detectivity and a high demodulation contrast. This requirement involves high power consumption; this is one of the main drawbacks of CAPDs. The power consumption P in a CAPD follows the following equation, R and ΔV being the resistance and the potential difference between the control regions, respectively:
  P  =                    R        ⁡                  (                                    Δ              ⁢                                                          ⁢              V                        R                    )                    2        =                  Δ        ⁢                                  ⁢                  V          2                    R      
The power consumption can be reduced by several ways. Firstly, the potential difference ΔV between the control regions can be decreased. Secondly, the distance between the control regions can be increased in order to increase the resistance between them. Both solutions would have an impact on the demodulation contrast of the device, as they impact the electric field intensity in the layer that determines the charge carrier transport velocity and the speed demodulation.
In a conventional CAPD implementation as shown in FIGS. 2 A-C and FIG. 3, reduction in power consumption is typically achieved by separating the nodes by high-ohmic epitaxial layer (for example doped p−−) which, as a consequence, consumes valuable pixel optical area and renders the shrinking of the pixel pitch challenging. In addition, the pixel transistors are located typically in a p-well area, again physically separate from the detection nodes of the pixel. The separation requirement means space that cannot be used for other things such as pixel transistors. Therefore, in conventional CAPDs reducing the pixel pitch remains very challenging when coupled with a device specification targeting low power consumption and high fill factor.
A solution remains to be proposed in order to decrease the power consumption of CAPDs while reducing the size of the pixels and maintaining a high speed of demodulation. This current invention proposes a CAPD device architecture that provides a solution for further pixel miniaturisation without the detrimental power consumption impact of a conventional CAPD approach in small pixel pitches and at the same time it allows a platform for implementing the CAPD configuration in a BSI implementation.